The present invention relates to semiconductor devices and more particularly relates to a SiGeC hetero-bipolar transistor (SiGeC-HBT) whose composition is expressed by the chemical formula Si1-x-yGexCy (hereinafter also referred to simply as “SiGeC”).
In recent years, as wireless communication equipment such as mobile telephones and wireless LANs has come to be extensively used in our daily life, high-frequency ICs have come into increasing demand. Conventionally, semiconductor devices capable of operating in high-frequency regions have been difficult to fabricate without using high-cost compound-semiconductor processing technology. Thus, if such semiconductor devices could be fabricated using a silicon process, there would be a great advantage in terms of cost and integration. Bipolar transistors are, among various semiconductor devices, particularly necessary for analog amplification circuits used for wireless communication, and a bipolar transistor capable of operating at high frequency with low power consumption is thus being intensely sought.
In this regard, a hetero-bipolar transistor (SiGeC-HBT) whose core base layer is formed using a technique for epitaxially growing a SiGe:C crystal has recently become practicable as a means for achieving such a low-power-consumption bipolar transistor capable of high-frequency operation. The SiGeC-HBT has improved high-frequency characteristics because the base formed by such a technique can have a very small width, which results in reduction in the base transit time τF.
FIG. 14A is a cross-sectional view schematically illustrating an exemplary structure of a known SiGeC-HBT, and FIG. 14B shows the profiles of Ge content, C content and impurity concentration in an emitter/base stacked portion therein.
As shown in FIG. 14A, the SiGeC-HBT includes a Si substrate 101, a Si epitaxially grown layer 102, deep trench isolations 103, a shallow trench isolation 104, a buried N+ layer 105, and a SIC (self-aligned implanted collector) layer 106. The Si epitaxially grown layer 102 is formed on the Si substrate 101 by epitaxial growth. The deep trench isolations 103, which surround an HBT region, are formed passing through the Si epitaxially grown layer 102 to reach part of the Si substrate 101. The shallow trench isolation 104 is formed in a portion of the Si epitaxially grown layer 102. The buried N+ layer 105, which contains an n-type impurity (such as arsenic (As)) at a high concentration, is formed across the boundary between the Si substrate 101 and the Si epitaxially grown layer 102. The SIC layer 106, which is in contact with the buried N+ layer 105, is formed by implanting ions of an n-type impurity (such as phosphorus (P)) into the Si epitaxially grown layer 102. Formed on a collector layer located within the Si epitaxially grown layer 102 over the SIC layer 106 is an emitter/base stacked portion 120 obtained by stacking SiGeC and Si layers.
As shown enlarged in the upper right of FIG. 14A, the emitter/base stacked portion 120 includes a SiGeC spacer layer 121, a SiGeC core base layer 122, a Si cap layer 123, and an emitter layer 125. The SiGeC spacer layer 121 is epitaxially grown on the Si epitaxially grown layer 102 (the collector layer). The SiGeC core base layer 122, which contains boron at a high concentration, is epitaxially grown on the SiGeC spacer layer 121. The Si cap layer 123 is epitaxially grown on the SiGeC core base layer 122. The emitter layer 125 is formed by doping the Si cap layer 123 with an n-type impurity (such as phosphorus (P)).
Further, an external base layer 111 is provided on the emitter/base stacked portion 120 laterally, and an insulating layer 113 and an emitter electrode 112 are provided on the emitter/base stacked portion 120. The insulating layer 113 surrounds an opening for the emitter, and the emitter electrode 112 is surrounded by the insulating layer 113 and in contact with the emitter layer 125 at the opening for the emitter. The emitter electrode 112 is made of polysilicon containing a high concentration of an n-type impurity, for example, phosphorus (P). The emitter layer 125 is formed by heat-treating the phosphorous (P) existing in the emitter electrode 112 to diffuse it into the Si cap layer 123. In addition, the upper portions of a collector wall layer 107 and the emitter electrode 112 are silicide layers 107a and 112a, respectively.
The structure of the SiGeC-HBT shown in FIG. 14A is an example of a known SiGeC-HBT. SiGeC-HBTs having a structure other than the structure shown in FIG. 14A have been proposed or made practicable. Nonetheless, SiGeC-HBTs typically have an emitter/base stacked portion such as shown in the upper right of FIG. 14A.
FIG. 14B shows a specific structural example of the emitter/base stacked portion in the SiGeC-HBT shown in the upper right of FIG. 14A. The example is described on p. 703 of an IEEE IEDM 98 article entitled “Si/SiGe:C Heterojunction Bipolar Transistors in an Epi-Free Well, Single-Polysilicon Technology” (D. Knoll and ten others, Institute of Semiconductor Physics: IHP).
In FIG. 14B, the abscissa represents the depth from the upper surface of the Si cap layer 123, and the ordinate represents the Ge content (indicated by the solid line), the C content (indicated by the dashed line), and the B (boron) concentration (indicated by the dotted-dashed line), wherein the units (atoms/cm3) used to express the boron concentration are different from the units (%) in which the Ge and C contents are expressed.
As indicated in FIG. 14B, the Ge content profile shows that the Ge content is substantially constant (about 25%) in the SiGeC spacer layer 121 and is graded in the SiGeC core base layer 122. Specifically, in the SiGeC core base layer 122, the Ge content is the same (about 25%) as in the SiGeC spacer layer 121 at the end portion that contacts the SiGeC spacer layer 121, and is the same (0%) as in the Si cap layer 123 at the end portion that contacts the Si cap layer 123. The C content profile shows that the C content is constant at a low level (about 0.1%) in the SiGeC spacer layer 121 and the SiGeC core base layer 122.
FIG. 15 is a diagram illustrating an energy band in a longitudinal section passing through the emitter/base junction in a SiGeC-HBT having the structure shown in FIG. 14B. While the SiGeC-HBT operates, a voltage positive with respect to the emitter layer 125 is applied to the SiGeC core base layer 122. Thus, the potential of the emitter layer 125 relatively increases, and as shown in FIG. 15, electrons e transit in a conduction band Ec heading from the emitter layer 125 through the SiGeC core base layer 122 to the SiGeC spacer layer 121 (and then to the collector layer). At this time, the electrons can transit in the SiGeC core base layer 122 at higher speed because the SiGeC core base layer 122 has a gradient composition and thus a gradient potential.
Generally, when a SiGe layer is epitaxially grown on a Si layer, a relatively large strain is caused in the SiGe layer because Ge atoms have a greater lattice constant than Si atoms. The bandgap Eg of the SiGe layer under such a strain becomes smaller than that of the Si layer. Specifically, the bandgap of the SiGe layer normally decreases by about 7.5 meV for every percent Ge in the composition. To exploit this, in a SiGe-HBT, Ge content in the core base layer is gradually increased heading toward the collector side, thereby grading the Ge profile. When the Ge profile is graded such that the Ge content in the core base layer is gradually increased heading toward the collector side, the potential of the conduction band Ec of the core base layer decreases gradually in the direction heading from the emitter side to the collector side. Accordingly, electrons passing through the base can be accelerated so as to reach the collector quickly, resulting in increase in operating speed of the device. Further, the fact that the core base layer contains Ge makes the bandgap Eg smaller. Thus, even if a voltage Vbe applied to the core base layer is lower, a large amount of a collector current Ic flows and then the base current Ib relatively decreases. Thus, the current gain hFE increases. As a result, even if the concentration of an impurity (such as boron) is increased in the core base layer, the current gain hFE does not decrease that much. Thus, with the current gain hFE kept at a high level, the base resistance can be reduced. Described above are the basic advantages of a SiGe hetero-bipolar transistor (SiGe-HBT).
On the other hand, advantages of forming a SiGeC core base layer by having the core base layer contain carbon (C) are as follows. In an npn bipolar transistor in which the base layer is doped with boron, there is a problem in that boron diffusion in the SiGe core base layer causes the base resistance to be increased, or the base width to be enlarged, leading to a longer traveling time of the electrons in the base. Because of the boron diffusion due to thermal enhanced diffusion (TED) occurring during heat treatment, it is difficult to make the base width 20 nm or less, for example. Nevertheless, such heat treatment is absolutely necessary for activating the impurity. Further, in order to make the base width small, the impurity concentration has to be high so that punch-though is prevented and the base resistance is reduced. Specifically, making the base width 20 nm or less, for example, requires the boron concentration to be 1×1019 atoms/cm3 or higher.
Boron diffusion can be controlled by having the SiGe layer contain carbon (C). Thus, the formation of a SiGeC core base layer allows a high concentration of boron to be confined in the small-width base even after heat treatment has been carried out. It has been found that carbon acts effectively when contained at a content of about 0.1% or more. In other words, boron diffusion can be controlled in a SiGeC core base layer, as a result of which the B concentration in the SiGeC core base layer can be kept at a high level.
With the example in the journal article mentioned above, since the SiGeC core base layer 122 contains carbon (C) at about 1020 atoms/cm3 (about 0.1%), it is possible to reduce the width of the base such that the base transit time τf can be shortened, thus allowing high-speed operation. For example, high-speed operation enabling a cutoff frequency fTmax of 65 GHz and a maximum oscillation frequency fmax of about 90 GHz has been achieved.
However, the known SiGeC-HBT having the emitter/base stacked portion disclosed in the foregoing journal article also has the following drawbacks.
Generally, as for a vast majority of circuits, such as differential amplifiers used in wireless communication equipment, variations in the current gain hFE(β) have to be small among the HBTs included in a circuit. However, in the above-mentioned known SiGeC-HBT, it is difficult to sufficiently reduce variations in the current gain hFE. The current gain hFE is the ratio between the collector current Ic and the base current Ib. After the emitter/base stacked portion has been formed by an UHV-CVD or like epitaxial growth process, the surface of the stacked portion is cleaned before a polysilicon film, which acts as the emitter electrode, is deposited on the emitter/base stacked portion. After this cleaning process, or while the polysilicon is grown in a CVD chamber at high temperature, a poor SiO2 layer (native oxide film) is formed on the surface of the epitaxially grown layer (that is, the emitter/base stacked portion). The ununiformity of the thickness of the native oxide film formed at the interface between the Si cap layer of the emitter/base stacked portion and the emitter electrode results in variations in the diffusion for forming the emitter, hole barriers formed by the native oxide film itself, and other ununiformity. And the existence of such ununiformity causes large variations in the base current Ib, which turns out to be a principal cause of variations in the current gain hFE.